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library ieee;use ieee.std_logic_1164.all; use IEEE.std_logic_arith.all;entity IQGainPhaseCorrection isgeneric(input_width:natural:=11; output_width:natural:=7);port( clk:in std_logic; x1 :in std_logic_vector(input_width downto 0); y1 :in std_logic_vector(input_width downto 0); gain_error :out std_logic_vector(output_width downto 0); phase_error :out std_logic_vector(output_width downto 0));end IQGainPhaseCorrection;

architecture IQGainPhaseCorrection_beh of IQGainPhaseCorrection is --signal declarations --phase error calculation signal reg_1:std_logic_vector(7 downto 0); signal reg_1_sv:std_logic_vector(7 downto 0); --gain error calculation signal reg_2:std_logic_vector(7 downto 0); signal reg_2_sv:std_logic_vector(7 downto 0); --Phase Offset Corrected signal y2:std_logic_vector(7 downto 0); --Gain and Phase Offset Corrected signal y3:std_logic_vector(7 downto 0); begin correction : process --local variables --SNR scaling? variable mu_1:real:=0.0002; variable mu_2:real:=0.0001; begin wait until clk'event and clk = '1'; y2 <= y1 - reg_1 * x1; reg_1_sv <= reg_1; reg_1 <= reg_1 + mu_1 * x1 * y2; y3 <= y2 * reg_2; reg_2_sv <= reg_2; reg_2 <= reg_2 + mu_2*(abs((x1)*(x1)) - abs((y3)*(y3))); end process;end IQGainPhaseCorrection_beh;

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## 2 comments:

library ieee;

use ieee.std_logic_1164.all;

use IEEE.std_logic_arith.all;

entity IQGainPhaseCorrection is

generic(input_width:natural:=11;

output_width:natural:=7);

port(

clk:in std_logic;

x1 :in std_logic_vector(input_width downto 0);

y1 :in std_logic_vector(input_width downto 0);

gain_error :out std_logic_vector(output_width downto 0);

phase_error :out std_logic_vector(output_width downto 0)

);

end IQGainPhaseCorrection;

architecture IQGainPhaseCorrection_beh of IQGainPhaseCorrection is

--signal declarations

--phase error calculation

signal reg_1:std_logic_vector(7 downto 0);

signal reg_1_sv:std_logic_vector(7 downto 0);

--gain error calculation

signal reg_2:std_logic_vector(7 downto 0);

signal reg_2_sv:std_logic_vector(7 downto 0);

--Phase Offset Corrected

signal y2:std_logic_vector(7 downto 0);

--Gain and Phase Offset Corrected

signal y3:std_logic_vector(7 downto 0);

begin

correction : process

--local variables

--SNR scaling?

variable mu_1:real:=0.0002;

variable mu_2:real:=0.0001;

begin

wait until clk'event and clk = '1';

y2 <= y1 - reg_1 * x1;

reg_1_sv <= reg_1;

reg_1 <= reg_1 + mu_1 * x1 * y2;

y3 <= y2 * reg_2;

reg_2_sv <= reg_2;

reg_2 <= reg_2 + mu_2*(abs((x1)*(x1)) - abs((y3)*(y3)));

end process;

end IQGainPhaseCorrection_beh;

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